PAC Duo 多核心驗證開發板
1.ARM926 RISC embedded processor (Real Chip: 300 Mhz)
2.Two 32-bit PAC DSP cores (Real-chip Version: 300 Mhz) or one 32-bit PAC DSP core (FPGA Version: 40 Mhz)
3.Dual DRAM channel architecture (SDRAM+DDR2 SDRAM)
4.High performance AMBA 3.0 AXI on-chip bus for DSP subsystem
5.128MB 300 Mhz DDR2 DRAM for AXI high performance on-chip bus
6.64MB 133 Mhz SDRAM for AHB on-chip bus
7.Vector interrupt controller
8.Mailbox for inter-processor communication
9.EMDMA (Enhanced multi-media DMA) for multi-media applications
10.AXI bus On-chip 128KB SRAM
11.Peripherals
uLCD controller
uUSB 2.0
uCamera controller
uFlash controller
uDDR2 SDRAM controller
uSD/MMC controller
uEthernet
uOthers : Timer, I2C, SPI, I2S, watchdog, PWM, GPIO, UART
12.ARM9/PACDSP ICE debug port
13.Mictor logic analyzer interface daughter board
14.Support Linux 2.6.23 ( Android OS compatible)
15.Support Linux BSP |
